Current Issue : April-June Volume : 2025 Issue Number : 2 Articles : 5 Articles
A graded composition superlattice structure is proposed by combining simulation with experimentation. The structural factors affecting graded symmetric superlattices and graded asymmetric superlattices and their action modes are simulated and analyzed. A Mg-doped graded symmetric superlattice structure with high Al content, excellent structural quality, good surface morphology and excellent electrical properties was grown by MOCVD equipment. The AlxGa1−xN superlattice with Al composition of 0.7 in the barrier exhibits a hole concentration of approximately 5 × 1015 cm−3 and a resistivity of 66 Ω·cm....
A recent study reported the rapid growth of SiC single crystals of ~1.5 mm/h using high-purity SiC sources obtained by recycling CVD-SiC blocks used as materials in semiconductor processes. This method has gained attention as a way to improve the productivity of the physical vapor transport (PVT) method, widely used for manufacturing single crystal substrates for power semiconductors. When recycling CVD-SiC blocks by crushing them for use as sources for growing SiC single crystals, the properties and the particle size distribution of the material differ from those of conventional commercial SiC powders, making it necessary to study their effects. Therefore, in this study, SiC single crystals were grown using the PVT method with crushed CVD-SiC blocks of various sizes as the source material, and the growth behavior was analyzed. Simulation results of the temperature distribution in the PVT system confirmed that using large, crushed blocks as the SiC source material generates a greater temperature gradient within the source compared to conventional commercial SiC powder, making it advantageous for rapid growth processes. Additionally, when the large, crushed blocks were vertically aligned, good crystal quality was experimentally achieved at high growth rates, even under non-optimized growth conditions....
In this study, we propose a novel design for a NAND gate using a single semiconductor optical amplifier (SOA) followed by a delay interferometer (DI). This streamlined configuration significantly reduces complexity and cost compared to conventional methods, which typically require cascading multiple SOA-Mach–Zehnder interferometers (SOA-MZIs) for NAND gate implementation. Our approach directly generates the NAND logic output with a single SOA and DI, simplifying the overall design. The gate’s performance is evaluated at 80 Gb/s, achieving a high-quality factor (QF) of 10.75. We also analyze the impact of key parameters to optimize the gate’s functionality. Furthermore, we assess the effect of amplified spontaneous emission on the QF, providing a more comprehensive evaluation of the system’s performance. This research paves the way for more efficient and cost-effective complex optical logic circuit solutions....
The traditional Von Neumann architecture creates bottlenecks due to data movement. The compute-in-memory (CIM) architecture performs computations within memory bit-cell arrays, enhancing computational performance. Edge devices utilizing artificial intelligence (AI) address real-time problems and have established themselves as groundbreaking technology. The 8T structure proposed in this paper has strengths over other existing structures in that it better withstands environmental changes within the SRAM and consumes lower power during memory operation. This structure minimizes reliance on complex ADCs, instead utilizing a simplified voltage differential approach for multiply-and-accumulate (MAC) operations, which enhances both power efficiency and stability. Based on these strengths, it can achieve higher battery efficiency in AI edge devices and improve system performance. The proposed integrated circuit was simulated in a 90 nm CMOS process and operated on a 1 V supply voltage....
This article presents a framework of using MEMS sensors to investigate unsteady flow speeds of a flapping wing or the new concept of sensors on flapping wings (SOFWs). Based on the implemented self-heating flow sensor using U18 complementary metal–oxide– semiconductor (CMOS) MEMS foundry provided by the Taiwan Semiconductor Research Institute (TSRI), the compact sensing region of the flow sensor was incorporated for in situ diagnostics of biomimetic flapping issues. The sensitivity of the CMOS MEMS flow sensor, packaged with a parylene coating of 10 μm thick to prolong the lifetime, was observed as −3.24 mV/V/(m/s), which was below the flow speed of 6 m/s. A comprehensive investigation was conducted on integrating CMOS MEMS flow sensors on the leading edge of the mean aerodynamic chord (m.a.c.) of the flexible 70-cm-span flapping wings. The interpreted flow speed signals were checked and demonstrated similar behavior with the (net) thrust force exerted on the flapping wing, as measured in the wind tunnel experiments using the force gauge. The experimental results confirm that the in situ measurements using the concept of SOFWs can be useful for measuring the aerodynamic forces of flapping wings effectively, and it can also serve for future potential applications....
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